Can machine learning solve the thorny problems in the field of electronic design?

Nine companies in the United States and three universities have joined hands to develop a research and development program to see if machine learning can solve some of the toughest problems in the field of electronic design; the newly established CAEML (Center for Advanced Electronics through Machine Learning) research center is One of the many attempts by the industry to take advantage of emerging artificial intelligence technologies.

CAEML Director Elyse Rosenbaum said at a recent symposium at DesignCon in the United States that the plan is like a lot of ideas in the technology field: "It happened in a coffee shop in an afternoon; we are facing common problems. It is necessary to interface with electro-migraTIon and behavior patterns in the circuit field, but I don't know how to get it because the peers are interested in different applications."

Rosenbaum said: "We know that we can't get funding for a particular problem, so we decided we needed to solve all the problems and worked with other universities to investigate a variety of machine learning techniques and algorithms suitable for use in electronic design. ."

The program was supported by the National Science Foundation (NSF) and nine companies, including: ADI, Cadence, Cisco, HPE (Hewlett-Packard Enterprise), IBM, Nvidia, Qualcomm, Samsung, and Xilinx; The University is the University of Illinois Urbana-Champaign, North Carolina State University (NCSU), and Georgia Tech.

So far, participating members of the program have identified areas of interest including high-speed interconnects, power transmission, system-level electrostatic discharge (ESD), IP core reuse, and design rule checking. Rosenbaum's research team will Exploring the use of recurrent neural nets to model the ESD characteristics of a circuit allows the system to pass quality testing for the first time.

Rosenbaum said: "We want to model phenomena that cannot be modeled using existing technologies... for example, depending on the power transmission network and the multi-core interactions in the processor."

One of the obstacles to overcome is to find a way to define neural network prediction as the effective output of the entity; Rosenbaum points out that, on the whole, researchers need to carefully construct each step of the machine learning program, from obtaining good training data to selecting candidates. Model, train them, and verify their results.

She added: "Most of the things we usually build are discriminating models that include expected output, but the generator-generated model (generaTIve model) provides the possibility between input and output, which is like Statistical issues such as manufacturing variations in chips are very useful."

Chris Cheng, an outstanding technical staff member at HPE Storage, cited several examples of his application for machine learning. For example, he foresees that future chip vendors can provide interactive components as neuron engineers can test and train through cloud services. Model; he also predicts that channel analysis can be processed in the form of cloud services using machine learning. In addition, he also portrayed the idea of ​​embedding a neural network in an oscilloscope to enable dynamic learning equalization (equalizaTIon) technology.

David White, senior research director at Virtuoso, a simulation design tool at EDA provider Cadence, said the company has tried to solve the thorny issues of chip design using machine learning. Machine learning can provide increased processing design rules and large-scale chip design for advanced process nodes. The way.

White described that in the future there will be design tools that can provide feedback on issues such as electron migration and parasitic extraction in the chip design process, which will reduce the number of design iterations that chip designers have experienced today. . NCSU professor Paul Franson pointed out that students have used machine learning to reduce the iterative design of chip winding from 20 to 4 times.

Compilation: Judith Cheng

(Reference original: AI Tapped to Improve Design, by Rick Merritt)

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